Staff Design Verification Engineer
signal devices IC top-level DMS SV/UVM verification, Object-Oriented and Randomized Verification, as well as Gate Level... and validation environments, supporting post-silicon validation. Execute for 100% verification coverage, combining DMS and AMS, top...
Lugar: Edinburgh - Freer, TX | 04/07/2026 17:07:56 PM | Salario: S/. No Especificado | Empresa: Analog Devices