Package Design Engineer

ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high... signal integrity and power integrity, to apply to package designs Cadence APD (allegro package designer) experience...

Lugar: San Jose, CA | 03/12/2025 21:12:41 PM | Salario: S/. No Especificado | Empresa: Broadcom

Package Design Engineer

ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high... signal integrity and power integrity, to apply to package designs Cadence APD (allegro package designer) experience...

Lugar: San Jose, CA | 02/12/2025 22:12:20 PM | Salario: S/. No Especificado | Empresa: Broadcom

Hardware Board Design Engineer

schematics using OrCAD and manage board layouts using Allegro tools. Design boards and systems to meet technical requirements... activities. Partner with manufacturing teams to ensure successful production and delivery to customers. Prepare and present...

Lugar: Santa Clara, CA | 05/11/2025 22:11:42 PM | Salario: S/. No Especificado | Empresa: Qualcomm