Mid to Sr. FPGA Engineer
Pin and Timing Constraints management Demonstrated ability to debug complex FPGA designs in system Ability to implement..., Microblaze, NIOS Experience with DMA and AMBA Buses such as AXI/AXIS and ACP Simulation experience – Understanding...
Lugar: Rochester, NY | 15/10/2024 17:10:20 PM | Salario: S/. No Especificado | Empresa: CACI International