PCIe/CXL Design Engineer (Principle)
on Marvell's growth. The customers served by this team are often other chip companies and big tech companies. What You Can..., synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification...
Lugar: Westborough, MA | 07/12/2025 03:12:26 AM | Salario: S/. No Especificado | Empresa: Marvell