Principal FPGA Engineer I

and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...

Lugar: Westminster, CO | 19/06/2026 17:06:15 PM | Salario: S/. $158000 - 189000 per year | Empresa: CesiumAstro

Coding Manager (Risk Adjustment)

and quality;address coders work performance concerns through meeting with the Coder and/or coding vendor leadership to develop... (Coder I, Coder II, QA I and QA II and Team Leads) in the Clinical Coding Department. These reports cross production...

Lugar: USA | 19/06/2026 02:06:22 AM | Salario: S/. $82000 - 102000 per year | Empresa: Cotiviti