Senior FPGA Engineer

-speed timing closure for Xilinx FPGAs. Current hands-on experience in HDL design, simulation and testing a must Working...

Lugar: Cardiff By The Sea, CA | 03/02/2026 03:02:21 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos

Python Developer

Serve as primary point of contact for current and future data sources/technical partners Set up technical exchange meetings...

Lugar: Herndon, VA | 03/02/2026 03:02:30 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos

Senior FPGA Engineer

-speed timing closure for Xilinx FPGAs. Current hands-on experience in HDL design, simulation and testing a must Working...

Lugar: Chula Vista, CA | 03/02/2026 03:02:36 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos

Senior FPGA Engineer

-speed timing closure for Xilinx FPGAs. Current hands-on experience in HDL design, simulation and testing a must Working...

Lugar: National City, CA | 03/02/2026 03:02:29 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos

Python Developer

Serve as primary point of contact for current and future data sources/technical partners Set up technical exchange meetings...

Lugar: Sterling, VA | 03/02/2026 03:02:46 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos

Python Developer

Serve as primary point of contact for current and future data sources/technical partners Set up technical exchange meetings...

Lugar: Chantilly, VA | 03/02/2026 03:02:34 AM | Salario: S/. $131300 - 237350 per year | Empresa: Leidos