Density Fill PDK Development Engineer

cases and systems to validate software tools and ensure seamless integration with various design methodologies. Innovate... environments. Preferred Qualifications: Experience with advanced physical verification techniques, including DRC, and density...

Lugar: Hillsboro, OR | 03/04/2026 00:04:26 AM | Salario: S/. No Especificado | Empresa: Intel

Senior Density Fill Development Engineer

cases and systems to validate software tools and ensure seamless integration with various design methodologies. Innovate..., including DRC, and density/fill modules. Familiarity with custom layout tools such as Cadence Virtuoso or Synopsys Custom...

Lugar: Hillsboro, OR | 02/04/2026 19:04:38 PM | Salario: S/. No Especificado | Empresa: Intel

Senior Layout Design Engineer

Layout Suite, layout debug (DRC, LVS). Programming/scripting in C/C++, Python. UNIX/Linux operating systems. Preferred... platforms, and integrates components into hierarchical systems to provide deployment coverage for end-to-end EDA tool testing...

Lugar: Hillsboro, OR | 27/03/2026 01:03:58 AM | Salario: S/. No Especificado | Empresa: Intel

Summer 2026 - Reticle Data Prep Software Intern

as external foundries. Perform DRC & LVS verification on chip design layouts when needed. Prepare reticle & mask data... skills/knowledge of design revision control systems such as Cliosoft, SVN or CVS. Advanced EDA flows and tools: Calibre DRV...

Lugar: Allen, TX | 18/03/2026 21:03:59 PM | Salario: S/. No Especificado | Empresa: onsemi

Staff DFT Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... execution-driven role requiring end-to-end ownership of DFT insertion, verification, DRC closure, and test coverage closure...

Lugar: Santa Clara, CA | 25/02/2026 01:02:32 AM | Salario: S/. $128000 - 189370 per year | Empresa: Marvell

Senior PIC Design Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... and top-level block placement to micro-architecture, optical & electrical routing, and back-end DRC and LVS verification...

Lugar: Santa Clara, CA | 24/02/2026 19:02:23 PM | Salario: S/. $113900 - 168500 per year | Empresa: Marvell

PCB Layout Automation Intern

Support Assist with basic routing and placement tasks Run design rule checks (DRC) and analyze results Support engineering... Interest in high-speed networking systems What You’ll Gain Real-world experience developing engineering automation tools...

Lugar: Sunnyvale, CA | 22/02/2026 03:02:16 AM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

Senior Photonic-Integrated-Circuit Engineer

circuit components and systems. Designs and optimizes photonic integrated circuits (PICs) and plays a key role in the..., fiber or free-space coupling. Exposure to EDA/PDA tools and methodologies. Familiarity with LVS, SDL, and DRC. PIC test...

Lugar: Santa Clara, CA | 20/02/2026 18:02:51 PM | Salario: S/. No Especificado | Empresa: Intel

Electrical Engineering Intern

, you will support the development of new digital products through hands-on work with embedded systems and real product hardware..., design rule checks (DRC), and manufacturing file preparation Update and organize the Altium component library to optimize...

Lugar: Indianapolis, IN | 14/02/2026 18:02:10 PM | Salario: S/. $20 - 24 per hour | Empresa: Masco