Technical Program Manager, MFG Test Engineering

readiness against that schedule, ensuring test engineering is never the surprise at a gate review. You will differentiate... into planning to empower engineers to focus on technical execution. WHAT YOU'LL DO Maintain an integrated view of every...

Lugar: Santa Clara, CA | 07/11/2026 03:11:15 AM | Salario: S/. No Especificado | Empresa: Everpure

NPI Manufacturing Engineer - Control Electronics

, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, . Headquartered in College Park, Maryland, IonQ... NPI pipeline for our control electronics subsystem. Responsibilities: Work with technicians and other engineers hands...

Lugar: College Park, MD | 07/11/2026 03:11:57 AM | Salario: S/. $102400 - 153600 per year | Empresa: IonQ

Senior Staff Integrated Capacity Planner

, storage, network, accelerated computing, and the power and site constraints that gate deployment - plus genuine depth...: You have raised the standard of work on a team you did not manage, and can point to planners or engineers who...

Lugar: San Francisco, CA | 07/11/2026 03:11:38 AM | Salario: S/. No Especificado | Empresa: Crusoe

Mechanical Engineering Leadership, Mechanisms

, digging into the physics, setting the architecture with your principal engineers and technical leads, and solving hard..., giving them the autonomy and frameworks to succeed. Our engineering leaders are deeply technical, accomplished engineers...

Lugar: Emeryville, CA | 07/11/2026 03:11:36 AM | Salario: S/. No Especificado | Empresa: Atomic Machines

Senior Staff Technical Program Manager - Compute Platform

, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, . Headquartered in College Park, Maryland, IonQ... authority, with the ownership that comes with it. You’ll work across four engineering teams and roughly forty engineers...

Lugar: Bothell, WA | 07/11/2026 03:11:16 AM | Salario: S/. No Especificado | Empresa: IonQ

Principal ASIC Design Verification Engineer

closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands... validation engineers to ensure end-to-end coverage and test. Support silicon bring-up and post-silicon validation through test...

Lugar: Seattle, WA | 07/11/2026 03:11:09 AM | Salario: S/. No Especificado | Empresa: K2 Space

Laser Safety Engineer

and engineers in the UK and Japan, and with QuEra's Laser Safety Officer in Facilities, who holds the regulatory role and site-wide... program authority. Responsibilities Safety by Design Own beam path safety review as a formal design gate for laser...

Lugar: Boston, MA | 07/11/2026 03:11:05 AM | Salario: S/. $140000 - 180000 per year | Empresa: QuEra Computing, Inc.

Technical Programme Manager, Electrical Engineering

, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, . Headquartered in College Park, Maryland, IonQ... programme lead TPM in our Programme Management Office. You will sit at the centre of a cross-functional group of engineers...

Lugar: College Park, MD | 07/11/2026 03:11:37 AM | Salario: S/. No Especificado | Empresa: IonQ

ASIC/SOC DFT Engineer (Silicon Engineering)

of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility... goals Run and debug non-timing and SDF annotated gate level simulations Creating ATPG content for use in post-silicon...

Lugar: Austin, TX | 07/11/2026 03:11:25 AM | Salario: S/. No Especificado | Empresa: SpaceX