RFIC Layout Engineer

effects such as LOD, WPE, etc. High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology...

Lugar: Irvine, CA | 23/10/2024 17:10:22 PM | Salario: S/. No Especificado | Empresa: Apple

Analog Layout Lead

with circuit design engineers plan/schedule work and coordinate vital layout tradeoffs as needed. Interpreting LVS, DRC and ERC... capacitance. Proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.) Experience using Cadence Virtuoso...

Lugar: Irvine, CA | 22/10/2024 23:10:28 PM | Salario: S/. No Especificado | Empresa: Apple

Analog Layout Lead

with circuit design engineers plan/schedule work and coordinate vital layout tradeoffs as needed. Interpreting LVS, DRC and ERC... capacitance. Proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.) Experience using Cadence Virtuoso...

Lugar: San Diego, CA | 22/10/2024 21:10:55 PM | Salario: S/. No Especificado | Empresa: Apple

Physical Design Engineer

/LVS/ERC/ANT checks, review and debug the issues, provide solutions and ensure signoff clean results Work with block... experience in deep submicron CMOS technologies Prior experience with physical verification (DRC, LVS, ERC, ANT), debug...

Lugar: San Jose, CA | 22/10/2024 17:10:50 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Industrial Liaison Officer

Industry Advisory Board meetings. Coordinate annual project evaluation process in conjunction with the annual ERC meeting... with other ERC EARTH staff. Support the EARTH Knowledge Warehouse by identifying relevant publications (technical and market based...

Lugar: South Dakota - Lawrence, KS | 20/10/2024 02:10:19 AM | Salario: S/. No Especificado | Empresa: University of Kansas

Software Engineer

required to sit and often uses repetitive hand motions. College/Department Highlights ASPIRE ERC is a multi-university industry...

Lugar: Logan, UT | 19/10/2024 20:10:54 PM | Salario: S/. No Especificado | Empresa: Utah State University

Software Engineer

required to sit and often uses repetitive hand motions. College/Department Highlights: ASPIRE ERC is a multi-university industry...

Lugar: Logan, UT | 19/10/2024 19:10:48 PM | Salario: S/. No Especificado | Empresa: Utah State University

Analog Layout Lead

with circuit design engineers plan/schedule work and coordinate vital layout tradeoffs as needed. Interpreting LVS, DRC and ERC... capacitance. Proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.) Experience using Cadence Virtuoso...

Lugar: Austin, TX | 18/10/2024 01:10:58 AM | Salario: S/. No Especificado | Empresa: Apple