Position Title Hardware Architect Location MountainView, CA - Onsite Type of Hire Contract Start Date Immediate Skills Location: Custom silicon, Digital&Power Electronics, Microcontroller, Signal integrity, Power Integrity...
and implementing HA architectures preferred Exposure to multiple, diverse technologies and processing environments CERTIFICATES...
UFS Engineer Key skills: Zebu,FPGA,UFS,ARM Develop and execute verification test plans for UFS host IP within a System-on-Chip (SoC) environment using tools like emulation platforms (Veloce, ZEBU, HAPs). Debug failures using waveform vi...
technologies and practices, reuse strategic platforms and standards, evaluate options, and make decisions with long-term...
Python & JTAG Engineer Required Skills : C++, Compilers, SDK, Native APIs, Python, AI/ML, PyTorch, TensorFlow Designing and maintaining Python-based libraries and scripts to control JTAG debuggers (e.g., Lauterbach Trace32, OpenOCD) fo...
NNP Engineer Required Skills - C++, Compilers, SDK, Native APIs, Python, AI/ML, PyTorch, TensorFlow Developing techniques such as quantization, pruning, and model distillation to adapt large neural networks for high-speed execution on s...
Key Skills: Veloce, Palladium, or ZeBu, PCIe and and memory technologies such as and HBM Set up and maintain Siemens... and memory technologies such as LPDDR and HBM Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC...
Integration Release Coordinator/Manager (100% Remote) Required AI Skills: Expected to demonstrate baseline proficiency in enterprise-approved AI tools as part of their day-to-day responsibilities. This includes, but is not limited to: ...
Major Incident Coordinator (100% Remote) Responsibilities End-to-end management of all major incidents throughout their lifecycle. Investigate and diagnose Major Incidents to restore failed Applications or Services in a timely. Coordi...
Role - DDR Engineer Location - San Jose CA Key skills: Zebu, FPGA, DR (All generations), ARM, DDR PHY, logic analysers, oscilloscopes, and simulation waveforms Job Description Ensuring DDR PHY and controller designs adhere strictly ...