Hardware Engineer 4
knowledge of: state of the art memory device technologies, interfaces such as SATA, SAS, PCIe Gen 3&4, ONFI and implementation...: defining stack-up and via technologies, part placement, setting design constraints, signal integrity and power integrity...
Lugar: San Jose, CA | 16/08/2024 19:08:24 PM | Salario: S/. No Especificado | Empresa: Cypress HCM