Senior Embedded Software Engineer, Motor Inverter

. Responsibilities: This role will require a deep understanding of complex embedded systems, state machines, FPGA integration, high...-on experience with test and measurement equipment such as oscilloscopes, logic analyzers, protocol analyzers, voltmeters...

Lugar: Santa Cruz, CA | 08/09/2024 22:09:17 PM | Salario: S/. $130900 - 192300 per year | Empresa: Joby Aviation

Senior Embedded Software Engineer, Motor Inverter

. Responsibilities This role will require a deep understanding of complex embedded systems, state machines, FPGA integration, high...-on experience with test and measurement equipment such as oscilloscopes, logic analyzers, protocol analyzers, voltmeters...

Lugar: Santa Cruz, CA | 08/09/2024 03:09:45 AM | Salario: S/. $130900 - 192300 per year | Empresa: Joby Aviation

ASIC Design Verification Engineer

, and general computational logic design/verification concepts Experience in Verilog/System Verilog and UVM/OVM Strong debugging... of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science...

Lugar: Santa Clara, CA | 21/09/2024 23:09:27 PM | Salario: S/. $126700 - 190100 per year | Empresa: Qualcomm

WIFI ASIC Design Verification Engineer, Senior

, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master...'s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration...

Lugar: Santa Clara, CA | 20/09/2024 00:09:37 AM | Salario: S/. $126700 - 190100 per year | Empresa: Qualcomm

Principal Digital Systems Engineer

successful candidate will drive innovation, provide technical guidance, and ensure the seamless integration of complex digital solutions... logic designs, effectively partitioning tasks between hardware (FPGA fabric) and software (embedded processors) to achieve...

Lugar: Lake Forest, CA | 07/09/2024 22:09:12 PM | Salario: S/. $190000 per year | Empresa: HR Pals

Mid-Level DevOps Engineer

applications and the integration of industry standard software stacks. GliaCell’s Enterprise capabilities include Full-Stack... etc. 10+ years of system architecture required with a demonstrated ability to read the code and understand the coding logic...

Lugar: Columbia, MD | 06/09/2024 06:09:55 AM | Salario: S/. $115000 - 190000 per year | Empresa: GliaCell Technologies

Mid-Level DevOps Engineer - Partial Telework

applications and the integration of industry standard software stacks. GliaCell’s Enterprise capabilities include Full-Stack... required with a demonstrated ability to read the code and understand the coding logic to assist in troubleshooting 10+ years' experience managing...

Lugar: Columbia, MD | 06/09/2024 01:09:45 AM | Salario: S/. $115000 - 190000 per year | Empresa: GliaCell Technologies

Sr Specialist, FPGA Digital Design Engineer

engineer, you will be directly involved in the design, integration, and test of advanced satellite communication links, digital... with standard lab equipment, including oscilloscopes, logic analyzers, and signal generators Preferred Additional Skills...

Lugar: San Diego, CA | 31/08/2024 22:08:17 PM | Salario: S/. $102000 - 190000 per year | Empresa: L3Harris Technologies