Hardware Validation Engineer II

FPGAs, Marvell Ethernet switches, and 400Gb optical interfaces. The engineer will execute validation plans, perform SI/PI...

Lugar: Spokane, WA | 25/01/2026 03:01:27 AM | Salario: S/. $86400 - 129600 per year | Empresa: F5

Lead Engineer, Software (Austin)

is a plus point ASICs/NPU. Working experience with Broadcom preferred but not required - XGS/DNX family of Devices and/or Marvell...

Lugar: Austin, TX | 18/01/2026 01:01:51 AM | Salario: S/. No Especificado | Empresa: Celestica