Physical Verification Engineer

for Manufacturability (DFM) flows. JOB RESPONSIBLITIES: Develop, validate, and maintain DRC decks for advanced technology nodes Support...). Proficiency in SVRF, TVF, or similar rule deck languages Familiarity with advanced process nodes (TSMC 2nm & 3nm) and foundry...

Lugar: San Jose, CA | 04/12/2025 01:12:59 AM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Sr. Physical Design Methodology Engineer, Annapurna Labs

and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes Drive... physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced technology nodes. - Proficient...

Lugar: Cupertino, CA | 04/12/2025 01:12:01 AM | Salario: S/. No Especificado | Empresa: Amazon

Coax Splicer

aerial and underground coaxial cable Optimize new Nodes and splice in node splits to reduce capacity Utilize RF Meters...

Lugar: Saint Johnsbury, VT | 04/12/2025 00:12:35 AM | Salario: S/. $25 - 35 per hour | Empresa: MasTec