RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: San Jose, CA | 21/11/2025 00:11:31 AM | Salario: S/. $117832 - 236090 per year | Empresa: MaxLinear

RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: San Jose, CA | 19/11/2025 23:11:05 PM | Salario: S/. $117832 - 236090 per year | Empresa: MaxLinear

Associate Director, MSAT

and Process Risk Assessment (FMEA) activities to establish appropriate process control strategies (PCS). Designs, prepares... network to incorporate lessons learned from ‘sending’ sites for an optimized manufacturing process. Leads, motivates, mentors...

Lugar: Springfield, NJ | 13/12/2025 19:12:38 PM | Salario: S/. $151700 - 227600 per year | Empresa: Lantheus

Senior Mechanical/Structural Engineer, Infrastructure

to continually work towards optimized vertiport launch solutions. Responsibilities: End-to-end project ownership through hosting... networks of electrified skydecks. Apply interdisciplinary engineering skills in fields of system-level process design...

Lugar: San Carlos, CA | 31/12/2025 23:12:53 PM | Salario: S/. $134100 - 221300 per year | Empresa: Joby Aviation

Senior Mechanical/Structural Engineer, Infrastructure

to continually work towards optimized vertiport launch solutions. Responsibilities End-to-end project ownership through hosting... networks of electrified skydecks. Apply interdisciplinary engineering skills in fields of system-level process design...

Lugar: San Carlos, CA | 30/12/2025 22:12:00 PM | Salario: S/. $134100 - 221300 per year | Empresa: Joby Aviation

Principal Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, automotive, and networking applications...

Lugar: Santa Clara, CA | 28/10/2025 20:10:58 PM | Salario: S/. $146850 - 220000 per year | Empresa: Marvell

Advanced Packaging, SI/PI Principal Engineer

designs require multi-chip, multiple component configurations involving, but not limited to, 2.5D and 3D packages, Co-packaged...’s most challenging designs and integrations with industry-leading packaging technologies What You Can Expect You will be responsible...

Lugar: Burlington, VT | 27/11/2025 02:11:22 AM | Salario: S/. $148500 - 219780 per year | Empresa: Marvell

Lead Software Engineer: Front-End

and animation techniques, while ensuring that all solutions are optimized for SEO and ready for analytics integration..., and performance-optimized interfaces. Develop responsive, high-performance front-end components using JavaScript, jQuery and modern...

Lugar: Jersey City, NJ | 04/01/2026 18:01:54 PM | Salario: S/. $152000 - 215000 per year | Empresa: JPMorgan Chase