Staff DFT Engineer

and assist with post-silicon pattern bring-up and debug Assist with ATE pattern conversion and debug as needed What We're... / BISR insertion and verification Boundary Scan (IEEE 1149.x) IJTAG (IEEE 1687) ATPG pattern generation and coverage...

Lugar: Santa Clara, CA | 24/02/2026 19:02:39 PM | Salario: S/. $128000 - 189370 per year | Empresa: Marvell