Senior Verification Engineer

of this scope aligned to your background. The team treats constrained-random simulation, formal methods, and processor-driven SoC... scenarios. • Select verification methods for each problem, including constrained-random simulation, formal analysis...

Lugar: El Segundo, CA | 09/10/2026 17:10:13 PM | Salario: S/. No Especificado | Empresa: Johnson Service Group

Senior Verification Engineer

for each problem, including constrained-random simulation, formal analysis, and directed testing. Develop verification environments... LDPC, FEC, framing, or beamforming logic using bit-accurate reference models and fixed-point analysis. Formal verification...

Lugar: Hutto, TX | 09/10/2026 17:10:16 PM | Salario: S/. No Especificado | Empresa: Protingent

SoC Static Timing Analysis (STA) Engineer, HBM

way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions... (HBM), dynamic random-access memory (DRAM), or memory-centric system-on-chip designs. Exposure to design for test timing...

Lugar: Richardson, TX | 03/10/2026 22:10:52 PM | Salario: S/. No Especificado | Empresa: Micron