Senior EDA Tools Hardware Engineer

's ability to deliver industry-leading silicon solutions with optimized power, performance, and efficiency. Collaborating... across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon...

Lugar: USA | 23/05/2026 00:05:08 AM | Salario: S/. No Especificado | Empresa: Intel

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

, and knowledge across all business units to drive first-pass-right silicon. As part of the COE, you will design, verify... customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation...

Lugar: Santa Clara, CA | 22/05/2026 22:05:33 PM | Salario: S/. $134390 - 201300 per year | Empresa: Marvell

Photonics Chip Lead

and integration requirements. Also contribute to the design of Silicon Photonic devices and subsystems to augment the Celestial... or related fields with 5-10 years of experience. Strong experience with complete Silicon Photonics PIC development...

Lugar: Santa Clara, CA | 22/05/2026 20:05:07 PM | Salario: S/. $158600 - 237600 per year | Empresa: Marvell

Senior Staff Design Verification Engineer – PCIE/CXL Sub-System

, and knowledge across all business units to drive first-pass-right silicon. As part of the COE, you will design, verify, and deliver... customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation...

Lugar: Irvine, CA | 22/05/2026 19:05:09 PM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell

Senior Staff Design Verification Engineer – PCIE/CXL Sub-System

, and knowledge across all business units to drive first-pass-right silicon. As part of the COE, you will design, verify, and deliver... customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation...

Lugar: Irvine, CA | 22/05/2026 19:05:29 PM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

, and knowledge across all business units to drive first-pass-right silicon. As part of the COE, you will design, verify... customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation...

Lugar: Irvine, CA | 22/05/2026 18:05:57 PM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell