Senior Staff Engineer, Digital Verification

, System Architects to define verification specifications. ? Design the test suites for full chip and block level verification... object-oriented programming skills in C++/SV, scripting languages like Python/Perl. Familiarity with Formal Verification...

Lugar: San Jose, CA | 14/03/2026 21:03:02 PM | Salario: S/. No Especificado | Empresa: Artech Information Systems

Senior Staff Engineer, Digital Verification - ACAS

: Collaborate with RTL Designers, System Architects to define verification specifications. Design the test suites for full chip... Verification Good object-oriented programming skills in C++/SV, scripting languages like Python/Perl. Familiarity with Formal...

Lugar: San Jose, CA | 14/03/2026 18:03:40 PM | Salario: S/. No Especificado | Empresa: Protingent

FPGA Design Verification Engineer

FPGA Design Verification Engineer Supporting Next-Gen Radar & Avionics Systems for a Top Aerospace & Defense Client... in the Country We are seeking a skilled FPGA Design Verification Engineer to join our dynamic team. This role involves the...

Lugar: Wayne, NJ | 06/03/2026 03:03:45 AM | Salario: S/. No Especificado | Empresa: Actalent

Senior Staff Engineer, Digital Verification - ACAS

, CA. Job Responsibilities: Collaborate with RTL Designers, System Architects to define verification specifications. Design the test suites...) Coherency, Memory Hierarchy Verification Good object-oriented programming skills in C++/SV, scripting languages like Python...

Lugar: San Jose, CA | 03/03/2026 18:03:53 PM | Salario: S/. No Especificado | Empresa: Protingent
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