CPU Physical Design Timing Engineer (Austin, TX)

. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA... environment. Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus Minimum Qualifications...

Lugar: Austin, TX | 30/06/2026 17:06:33 PM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm