Emulation Engineer, Technical Leader

Milpitas/San Jose office location. Meet The Team: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware...The application window is expected to close on: 04/30/2026 Job posting may be removed earlier if the position...

Lugar: San Jose, CA | 21/03/2026 18:03:03 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Staff/Sr. Staff Design Verification Engineer - QGOV

## Company: Qualcomm Technologies, Inc. ## Job Area: Engineering Group, Engineering Group >ASICS Engineering... DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches...

Lugar: San Diego, CA | 20/03/2026 18:03:34 PM | Salario: S/. No Especificado | Empresa: Qualcomm

ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)

for commercial airplanes, the Boeing Electronic Products group develops ASICs and FPGAs that are at the heart of Boeing's products...Job Description At Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering...

Lugar: California | 19/03/2026 03:03:31 AM | Salario: S/. $119850 - 162150 per year | Empresa: Boeing

Senior Emulation Engineer

Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product...About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure...

Lugar: Santa Clara, CA | 18/03/2026 00:03:25 AM | Salario: S/. $134390 - 201300 per year | Empresa: Marvell

Programmable Logic and ASIC Design Center of Excellence Lead

Job Description You will be the Programmable Logic & ASIC Center of Excellence (CoE) Lead for the Missiles & Fire Control (MFC) organization. Our CoE... unified, reusable flows and metrics that support multiple MFC programs. What You Will Be Doing As the PL/ASIC CoE Lead...

Lugar: Orlando, FL | 17/03/2026 18:03:57 PM | Salario: S/. No Especificado | Empresa: Lockheed Martin

Principal Applied ML Engineer

of a startup but backed by industry-leading verification technologies, we are part of the System Verification Group (SVG...). Our charter is to develop state-of-the-art EDA software and hardware platforms (including Xcelium, Jasper, Palladium, Protium...

Lugar: San Jose, CA | 14/03/2026 21:03:46 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

IP Design Verification Engineer

, Hillsboro Additional Locations: US, California, Santa Clara, US, Massachusetts, Beaver Brook Business group: At the Data... a critical role in ensuring the functional integrity of our intellectual property designs. This position involves comprehensive...

Lugar: Hillsboro, OR | 11/03/2026 20:03:42 PM | Salario: S/. No Especificado | Empresa: Intel

AI & Chip Design Intern (Summer 2026)

Group), whose charter is to develop state‑of‑the‑art EDA software and hardware platforms used for high‑performance...At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology...

Lugar: San Jose, CA | 28/02/2026 18:02:45 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Emulation Engineer

The Core Switch Group (CSG) at Broadcom is the industry leader in cutting-edge networking ASICs, developing advanced... like the Tomahawk and Trident series, setting benchmarks in the networking world. Broadcom, a global innovator in fabless...

Lugar: San Jose, CA | 20/02/2026 21:02:36 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom