FPGA Design Verification Engineer

is anticipated to close on Feb 5, 2026. About Actalent Actalent is a global leader in engineering and sciences services.... Essential Skills Proficiency in FPGA design verification. Experience with SystemVerilog and Universal Verification...

Lugar: Wayne, NJ | 23/01/2026 18:01:31 PM | Salario: S/. No Especificado | Empresa: Actalent

FPGA Design Verification Engineer

and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through.... Experience with SystemVerilog and Universal Verification Methodology (UVM). Knowledge of VHDL and Verilog. Familiarity...

Lugar: Wayne, NJ | 21/01/2026 20:01:05 PM | Salario: S/. No Especificado | Empresa: Actalent
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