Talent Meets Bertelsmann 2026

We use cookies to offer you the best possible website experience. Your cookie preferences will be stored in your browser's local storage. This includes cookies necessary for the website's operation. Additionally, you can freely decide and c...

Lugar: Gütersloh, Nordrhein-Westfalen | 10/03/2026 02:03:08 AM | Salario: S/. No Especificado | Empresa: RTL

Software Engineer (w/m/d) - TV

. Extra Loot: Zuschüsse für Deutschlandticket & JobRad, Urban Sports Club, RTL+ Premium, Corporate Benefits, Team-Events... About the Company smartclip is the adtech development unit of RTL Group — Europe’s leading free-to-air broadcaster group...

Lugar: Berlin | 06/04/2026 17:04:15 PM | Salario: S/. No Especificado | Empresa: Instaffo

FPGA Design Engineer (m/f/d)

families and IP for timing‑critical and safety‑related functions. Develop synthesizable RTL (VHDL) for: PWM generators... and a solid understanding of synthesizable RTL design, timing constraints, and clock domain crossing techniques. Hands...

Lugar: Berlin | 03/04/2026 20:04:20 PM | Salario: S/. No Especificado | Empresa: GE Vernova

DevOps Engineer (w/m/d) - Google Cloud Platform

-Entwicklungseinheit der RTL Group – Europas führender Free-TV Sendergruppe. Unsere proprietäre Werbetechnologie ist auf die spezifischen.... Die Media Sales Division von smartclip wird mit RTL AdConnect und G&J iMS zu einem internationalen Advertising Sales Champion...

Lugar: Hamburg | 03/04/2026 17:04:41 PM | Salario: S/. No Especificado | Empresa: Smartclip

Digital Design Engineer (f/m/div)

. Are you in? Your Role Key responsibilities in your new role Design, code in RTL, synthesize and integrate complex digital blocks... years of experience in digital design, with a focus on automotive or safety-critical systems Proficiency in RTL coding...

Lugar: München, Bayern | 03/04/2026 00:04:56 AM | Salario: S/. No Especificado | Empresa: Infineon

Senior Digital ASIC Design Engineer (m/f/d)

Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom modules Verification on module... Experience in Register Transfer Level (RTL) coding (Verilog) Experience with standard simulation tools for digital designs...

Lugar: Deutschland | 02/04/2026 18:04:48 PM | Salario: S/. No Especificado | Empresa: Advantest