Site Reliability Engineer (f/m/d) - Observability

, mental health support, corporate benefits, RTL+ access, and more. Application Process A quick intro call with Sarah (Head... from Sarah – no ghosting, we promise About the Company About smartclip smartclip is the adtech development unit of RTL Group...

Lugar: Berlin | 19/06/2026 17:06:08 PM | Salario: S/. No Especificado | Empresa: Instaffo

ASIC Design Engineer

RTL Design Engineer with 10+ years of experience in digital design and SoC development. The role involves RTL design... Execute and analyze Lint, CDC, and RDC checks to ensure robust design quality Develop RTL for complex digital blocks...

Lugar: Deutschland | 16/06/2026 23:06:13 PM | Salario: S/. No Especificado | Empresa: microTECH Global

Senior ASIC Design Engineer DfT (m/f/d)

gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom... in Register Transfer Level (RTL) coding (Verilog and System Verilog) Experience with standard simulation tools for digital designs...

Lugar: Baden-Württemberg | 16/06/2026 17:06:26 PM | Salario: S/. No Especificado | Empresa: Advantest

Senior Digital ASIC Design Engineer (m/f/d)

& Responsibilities Requirements gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding... methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog) Experience with standard...

Lugar: Baden-Württemberg | 16/06/2026 17:06:43 PM | Salario: S/. No Especificado | Empresa: Advantest

Expert Digital ASIC Design Engineer (m/f/d)

Architecture development for CMOS designs Design and RTL coding of digital and full-custom modules Verification on module and chip... in Register Transfer Level (RTL) coding (Verilog) Experience with standard simulation tools for digital designs Basic knowledge...

Lugar: Baden-Württemberg | 16/06/2026 17:06:05 PM | Salario: S/. No Especificado | Empresa: Advantest

Senior Digital ASIC Design Engineer Synthesis (m/f/d)

Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases... Circuit (ASIC) design methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog...

Lugar: Baden-Württemberg | 16/06/2026 17:06:42 PM | Salario: S/. No Especificado | Empresa: Advantest