Senior ASIC Design Engineer DfT (m/f/d)

gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom... in Register Transfer Level (RTL) coding (Verilog and System Verilog) Experience with standard simulation tools for digital designs...

Lugar: Baden-Württemberg | 05/05/2026 17:05:07 PM | Salario: S/. No Especificado | Empresa: Advantest

IC Digital Design Technical Lead

and implement complex digital systems (MCU, DSP, accelerators) Strong RTL design skills with production‑quality IP Solid... of semiconductor design experience Strong RTL design skills (Verilog/SystemVerilog) Experience with MCU/DSP systems and digital IP...

Lugar: Bayern | 02/05/2026 17:05:12 PM | Salario: S/. No Especificado | Empresa: Michael Page

Senior Architect

and platforms (e.g., Verilog, VHDL,SystemVerilog, UVM, RTL design, simulation, emulation, cloud orchestration). Familiarity...

Lugar: Deutschland | 02/05/2026 01:05:42 AM | Salario: S/. No Especificado | Empresa: Synopsys

Senior Digital IC Design Engineer

cycle, from specification and RTL design through functional and physical verification, all the way to post‑silicon... between digital logic and analog/mixed‑signal blocks. Experience with full design flow: architecture, RTL design, synthesis...

Lugar: Dresden, Sachsen | 25/04/2026 17:04:37 PM | Salario: S/. No Especificado | Empresa: Ferroelectric Memory