Verification Engineer

Build cocotb-based testbenches for RTL blocks ranging from complicated datapaths to multilevel interconnect, driven... violations directly in simulation, plus cover property statements to close functional-coverage gaps. Cross-check RTL behavior...

Lugar: Rheinland-Pfalz | 26/08/2026 17:08:16 PM | Salario: S/. No Especificado | Empresa: Ubitium GmbH

Expert Digital ASIC Design Engineer (m/f/d)

Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases... in digital design (SOC), ASIC design methodologies and silicon development cycle Experience in Register Transfer Level (RTL...

Lugar: Baden-Württemberg | 26/08/2026 17:08:28 PM | Salario: S/. No Especificado | Empresa: Advantest

Verification Engineer

. Tasks Build cocotb-based testbenches for RTL blocks ranging from complicated datapaths to multilevel interconnect, driven... violations directly in simulation, plus cover property statements to close functional-coverage gaps. Cross-check RTL behavior...

Lugar: Rülzheim, Rheinland-Pfalz | 26/08/2026 17:08:58 PM | Salario: S/. No Especificado | Empresa: Ubitium GmbH

Senior Digital ASIC Design Engineer Verification (m/f/d)

Architecture development for CMOS designs Design and RTL coding of digital and full-custom modules Verification on module and chip... design (SOC), ASIC design methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding...

Lugar: Baden-Württemberg | 25/08/2026 17:08:37 PM | Salario: S/. No Especificado | Empresa: Advantest