ASIC Digital Design Expert (f/m/div)

all the way through to final RTL implementation and lab validation You will uphold our “First Time Right” design philosophy... verification;this encompasses authoring detailed specifications, development of high-quality RTL code including performance...

Lugar: Dresden, Sachsen | 20/04/2026 02:04:18 AM | Salario: S/. No Especificado | Empresa: Bosch

IC Digital Design Technical Lead

complex digital systems (MCU, DSP, accelerators) Strong RTL design skills with production‑quality IP Solid understanding... of semiconductor design experience Strong RTL design skills (Verilog/SystemVerilog) Experience with MCU/DSP systems and digital IP...

Lugar: München, Bayern | 17/04/2026 17:04:18 PM | Salario: S/. €115842 - 173763 per year | Empresa: Michael Page

ASIC Digital Design Expert (f/m/div)

all the way through to final RTL implementation and lab validation You will uphold our “First Time Right” design philosophy... verification;this encompasses authoring detailed specifications, development of high-quality RTL code including performance...

Lugar: Dresden, Sachsen | 17/04/2026 02:04:19 AM | Salario: S/. No Especificado | Empresa: Bosch

Senior Software Engineer API - Node.js, SQL

– fast, hands-on, and without unnecessary meeting overhead. smartclip is the adtech development unit of RTL Group — Europe... of smartclip will merge with RTL AdConnect and G&J iMS to form RTL AdAlliance, an international advertising and technology sales...

Lugar: Hamburg | 16/04/2026 17:04:16 PM | Salario: S/. No Especificado | Empresa: Smartclip

Staff or Principal Digital ASIC Designer

, contributing to its definition, development, and optimisation Lead the RTL design of complex digital blocks and their integration... experience in ASIC digital design, with several years in a senior, staff, or principal role Expertise in RTL design...

Lugar: Dresden, Sachsen | 08/04/2026 23:04:24 PM | Salario: S/. €80000 - 100000 per year | Empresa: IC Resources

Senior Digital ASIC Design Engineer Synthesis (m/f/d)

& Responsibilities Architecture development for CMOS designs Design and RTL coding of digital and full-custom modules Verification... cycle Experience in Register Transfer Level (RTL) coding (Verilog and System Verilog) Experience with standard simulation...

Lugar: Deutschland | 08/04/2026 02:04:51 AM | Salario: S/. No Especificado | Empresa: Advantest

Expert Digital ASIC Design Engineer (m/f/d)

& Responsibilities Requirements gathering and elicitation for devices and IP Architecture development for CMOS designs Design and RTL... in digital design (SOC), ASIC design methodologies and silicon development cycle Experience in Register Transfer Level (RTL...

Lugar: Deutschland | 08/04/2026 01:04:45 AM | Salario: S/. No Especificado | Empresa: Advantest