Senior Staff Engineer Digital IP (f/m/div)

full design lifecycle--from micro-architecture and RTL development to integration, quality sign-off, and successful IP... such as I2C, UART, SPI, and AHB/APB while leveraging advanced automation and configurable RTL flows. Drive technical excellence...

Lugar: Dresden, Sachsen | 22/07/2026 22:07:25 PM | Salario: S/. No Especificado | Empresa: Infineon

FPGA Design Engineer (m/f/d)

and digital design methodologies. Strong skills in RTL coding (Verilog, VHDL), C/C++ programming, Python scripting, timing...

Lugar: Deutschland | 21/07/2026 23:07:35 PM | Salario: S/. No Especificado | Empresa: Advantest

R&D Engineer (FPGA)

applications. You will be involved in all phases of the product development lifecycle—from architecture definition and RTL design... in architecture definition and translate system requirements into FPGA design specifications Develop RTL code (e.g., VHDL/Verilog...

Lugar: Deutschland | 10/07/2026 00:07:55 AM | Salario: S/. No Especificado | Empresa: Keysight Technologies

R&D Engineer (FPGA)

. You will be involved in all phases of the product development lifecycle—from architecture definition and RTL design to verification... in architecture definition and translate system requirements into FPGA design specifications Develop RTL code (e.g., VHDL/Verilog...

Lugar: Baden-Württemberg | 09/07/2026 20:07:15 PM | Salario: S/. No Especificado | Empresa: Keysight Technologies