Electronic Hardware Design & Release Engineer ADV
compatibility and proper HW/SW integration throughout the product lifecycle. Validation & Testing Define and coordinate DV/PV...
Low Power Design/Methodology Engineer
, power aware DV and high speed clocking desired. · Proficiency in Verilog/System Verilog coding, verification techniques...
Lugar: Tijuana, B.C. | 04/04/2026 00:04:30 AM | Salario: S/. No Especificado | Empresa: Qualcomm
SoC/IP Design Verification Engineer
, and coverage. Collaborate cross-functionally with RTL design, architecture, DV, DFT, performance, firmware, and post-silicon...
Lugar: Guadalajara, Jal. | 02/04/2026 21:04:24 PM | Salario: S/. No Especificado | Empresa: Intel