SoC Pre-Silicon Verification Engineer

-standard verification methodologies such as UVM or System Verilog or Digital Design Advance English level... Qualifications: 3+ years System Verilog and UVM experience 2+ years in: Python for test automation. Simulation tools (VCS...

Lugar: Guadalajara, Jal. | 10/05/2026 20:05:03 PM | Salario: S/. No Especificado | Empresa: Intel

Senior SoC Pre-Silicon Verification Engineer

. 4+ years of experience in: Hardware description languages such as Verilog or VHDL and verification tools like UVM... solutions 4+ years SystemVerilog and UVM experience 4+ years Python for test automation C/C++ and scripting proficiency (Perl...

Lugar: Guadalajara, Jal. | 10/05/2026 17:05:54 PM | Salario: S/. No Especificado | Empresa: Intel
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