軟體工程師
. Altera or Xilinx) and even to Gate Array/Standard Cell type ASIC 4. Making hardware analog design and debugging. EMC...
. Altera or Xilinx) and even to Gate Array/Standard Cell type ASIC 4. Making hardware analog design and debugging. EMC...
. Altera or Xilinx) and even to Gate Array/Standard Cell type ASIC 4. Making hardware analog design and debugging. EMC...
, and ultimately to production, utilizing a structured gate-staged development process. Strategic Planning & Execution: Developing...-functional discussions on product health to drive informed phase-gate exits and mitigate architectural risks. Interdisciplinary...
, and Parts. Prepare necessary documentation in order to pass each Key Decision gate check on time. (PGP 2011 process) Drive...
of stage gate NPI processes and the ability to conduct cross functional gate reviews Highly motivated with ability to build...
-volatile memory technologies like split-gate flash, MRAM, and RRAM. Must be curious, proactive, and detail-oriented. Able...
PWM controllers, discrete gate drivers, and integrated smart power stages. Acting as a bridge between market needs...
introduce to mass production Responsible for NPI (after R-gate released) test data analysis and feedback to BL/PETE...
, stage‑gate governance, and project controls. Drive consistent execution practices across all projects, regardless of size...
Product Life Cycle (FPLC) processes. Participation in management gate reviews to represent design status & risk assessment...