Quality Engineer III

Verification Test Plan;(7) ECR/ECN/ECO;(8) Gate Deliverable Review;(9) Customer Satisfaction Survey (CSS) / QBR feedback;(10...

Lugar: Sanchong, New Taipei City | 06/05/2026 17:05:12 PM | Salario: S/. No Especificado | Empresa: Jabil

Senior/Staff ASIC Engineer

;support timing closure across synthesis, P&R, and signoff. Gate-Level Simulation (GLS) — Set up and debug gate-level..., timing constraints/STA, gate-level simulation, power estimation, UPF, or formal verification/ECO. Strong interest...

Lugar: Taipei City | 08/04/2026 22:04:45 PM | Salario: S/. No Especificado | Empresa: Micron