Senior Logic Design Manager (Teradyne, North Reading)
of FPGA/ASIC design experience. Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects...
of FPGA/ASIC design experience. Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects...
across cross-functional technical teams Lead initiatives involving: FPGA and ASIC design and development RF systems and low... in quantum physics, device physics, semiconductors, and RF systems Working knowledge of FPGA and ASIC design and development...
teams Lead initiatives involving: FPGA and ASIC design and development RF systems and low-level physics Semiconductor..., semiconductors, and RF systems Working knowledge of FPGA and ASIC design and development Excellent communication skills with the...
of different Optics and internals of a switch ASIC Experience configuring and troubleshooting routing and switching protocols (BGP...
computing applications , including compute, networking, accelerator-centric systems, and/or ASIC development and system...
computing applications , including compute, networking, accelerator-centric systems, and/or ASIC development and system...
computing applications , including compute, networking, accelerator-centric systems, and/or ASIC development and system...
Word, Excel, PowerPoint, and Outlook Knowledge of ASIC chip design, FPGAs, and integration into ASICs Ability...
integrated component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell...
integrated component platforms with high speed Silicon photonics, transmit and receive amplifiers, and controller ASIC...