FPGA Engineer Intern (Summer 2027 - Austin)
or ASICs Experienced in writing hardware in VHDL, Verilog, or System Verilog Passionate for writing clean code, well...
or ASICs Experienced in writing hardware in VHDL, Verilog, or System Verilog Passionate for writing clean code, well...
Job Summary Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens. You’ll work directly with our founders and embed with our ASIC team to build new agentic harnesses and operating sy...
, and verifying FPGAs and/or ASICs Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++ Experience with RTL...
for our networking ASICs and supporting infrastructure. PCIe software engineers write the code that manages high speed communication... software that mediate between networking ASICs, FPGAs, and PCIe bridges. Measuring hardware read and write performance...
About the Position We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you’ll have the opportunity to collaborate with people in areas ac...
and methodologies against lab measurements Analyze and guide power delivery for ASICs drawing 500+ amps, including static/DC...
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are he...
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native...
engineering and ASIC implementation). In this role, you will be developing next-generation ASICs for deployment in space... on complex SoCs or ASICs Hands-on experience with Automated Test Equipment (ATE) platforms (e.g., Teradyne, Advantest) for high...
for accelerators Experience profiling and analyzing deep learning workloads on hardware accelerators (GPUs, TPUs, ASICs, FPGAs...