a highly skilled and experienced Senior Staff Applications Engineer specializing in SerDes IP design and application. This role... in digital signal processing (DSP) algorithms, mixed-signal circuit design, bench debug, system application and customer support...
successful product integration. Design high‑performance board‑level systems for storage, network security, and custom ASIC applications..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Hardware Design Senior Staff...
Lugar:
Irvine, CA | 07/01/2026 23:01:15 PM | Salario: S/. $144800 - 214340 per year | Empresa:
Marvelldesign and verification (e.g., Cadence, Synopsys). Experience with lab equipment for signal integrity analysis and debugging... circuit design. This role is critical in driving the successful integration and application of Marvell’s SerDes IP...
transistor amplifiers to perform our validations. We use both Windows and Unix systems, Cadence for design, Python, C...
Programming/scripting in C/C++, Python. UNIX/Linux operating systems. 8+ years of experience in layout design, Cadence Virtuoso... design platforms, and integrates components into hierarchical systems to provide deployment coverage for end-to-end EDA tool...
Lugar:
Hillsboro, OR | 07/12/2025 00:12:44 AM | Salario: S/. No Especificado | Empresa:
Intel and drive product vision and lead the design of our systems. Key job responsibilities Primary responsibilities include... software, automation of support processes, documentation of our systems, manage AFSS org level operational cadence and programs...
Lugar:
Seattle, WA | 06/12/2025 22:12:55 PM | Salario: S/. No Especificado | Empresa:
Amazon) Experience in ASIC physical design: circuit layout using Cadence (Innovus, Spectre, Virtuoso) and Synopsys (VCS, ICC) Knowledge... researchers on the design and development of ASIC and/or proof-of-concept system platform Participate in a research project, work...