Senior to Principal SerDes Design Engineer roles About the job We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Candida...
Senior to Principal Analog Design Engineer roles About the job Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking ...
Senior to Principal Analog Design Engineer roles About the job Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking ...
Senior to Principal SerDes Design Engineer roles About the job We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Candida...
Senior to Principal PLL Design Engineer roles About the job Are you a PLL Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI? We are looking for a H...
Senior to Principal PLL Design Engineer roles About the job Are you a PLL Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI? We are looking for a H...
About the Role Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing... culture where ideas and initiative are valued The opportunity to grow alongside Celero as we scale and shape the future...
Principal Design Validation & Test (DVT) Engineer Irvine, CA About The Role Celero is seeking an experienced..., communications, data center, AI, or high-performance computing products. Strong understanding of silicon debug methodologies...
Senior to Principal Physical Design Engineer roles Locations: San Jose, CA or Irvine, CA or remote Core Responsibilities RTL-to-GDSII Execution: Own physical implementation of System-on-Chips (SoCs) or complex digital blocks. Design ...
CeleroCommunications ( ) is building the next generation of intelligent optical connectivity for AI infrastructure. Founded...Director of Product Marketing – Coherent DSP & Optical Networking Location: Irvine, CA (HQ) or remote About Celero...