High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from c...
Diamondx Semiconductor ATE Test Engineer Job Description: As a Test Engineer you will develop, modify, and sustain test software on a Cohu Diamondx Semiconductor ATE instrumentation for digital, analog, and mixed-signal ICs. You will cre...
Principal Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from concept to silicon ...
Senior ASIC Systems Engineer Job Description: The Senior ASIC Systems Engineer serves as the primary technical bridge between customers and the internal ASIC design team. This role is responsible for translating complex customer requirem...
Senior Staff or Principal Test Engineer – Mixed Signal / DSP Products Location: Irvine, CA Role Overview: As a Senior Staff Test Engineer, you will lead test development and manufacturing readiness for next-generation DSP and mixed-sig...
Senior Staff or Principal Test Engineer – Mixed Signal / DSP Products Location: Irvine, CA Role Overview: As a Senior Staff Test Engineer, you will lead test development and manufacturing readiness for next-generation DSP and mixed-sig...
Principal Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from concept to silicon ...
High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from c...
High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from c...
Principal Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from concept to silicon ...