IC Design Engineer - Analog/Mixed Signal

About the job Location: Plymouth, MN Department: ASIC Design & Development Group Reports To: Sr Director of ASIC... following: Data converters (Client/DAC), low-noise analog front ends, power management circuits (LDOs, DC-DC), clocking circuits...

Lugar: Minneapolis, MN | 05/06/2026 19:06:12 PM | Salario: S/. No Especificado | Empresa: NR Consulting

DTS Senior Project Manager

(group of related projects). Projects under the oversight of the Senior Project Manager are typically at the region... Project Director, PMI-ACP, PMI-DASSM, PMI-DAC, and/or PMI-DAVSC Lean process certification or demonstrated equivalent skill...

Lugar: USA | 05/06/2026 19:06:19 PM | Salario: S/. No Especificado | Empresa: Intermountain Health

Principal RF Designer and Architect

components and line-ups. Design & develop signal processing line-ups and RF chains from ADC/DAC to RF input/output Analyze... dynamic range performance based on noise figure, phase noise, quantization error, ADC SNR, filter group delay, isolation...

Lugar: Richardson, TX | 05/06/2026 18:06:10 PM | Salario: S/. No Especificado | Empresa: Qorvo

Senior Design Engineer

is filled or if a sufficient number of applications are received. Meet the Team Join Cisco’s Silicon Photonics group... in photonics and high-speed datapath circuits (modulators, TIAs, PLLs, ADC/DAC, CDR). Knowledge of industry standards (IEEE...

Lugar: Allentown, PA | 05/06/2026 17:06:16 PM | Salario: S/. $135800 - 198800 per year | Empresa: Cisco Systems

Design Verification Engineer - Acacia Networks

. Your Impact Reporting into Acacia/Cisco Device Verification Test group, this engineer will work closely with our integrated... and test automation, especially based on Python Knowledge of DAC/ADC operations and controls Knowledge of optical...

Lugar: Holmdel, NJ | 05/06/2026 17:06:59 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Principal RFIC Design Engineer

supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield... etc. PMIC - Linear and switched regulators, Low-drop out regulators etc. Data converters - ADC, DAC, Flash and SAR...

Lugar: San Jose, CA | 05/06/2026 02:06:06 AM | Salario: S/. $145800 - 194400 per year | Empresa: Western Digital

Principal RFIC Design Engineer

supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield... etc. PMIC – Linear and switched regulators, Low-drop out regulators etc. Data converters – ADC, DAC, Flash and SAR...

Lugar: San Jose, CA | 04/06/2026 17:06:16 PM | Salario: S/. $145800 - 194400 per year | Empresa: Western Digital

High Speed Mixed Signal Circuit Design Engineer

pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group.... Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high...

Lugar: San Jose, CA | 04/06/2026 00:06:38 AM | Salario: S/. No Especificado | Empresa: Nokia

Mixed Signal Logic Design Engineer

, ADC/DAC designs, communications theory, and/or microarchitecture design concepts Experience producing high-level..., US, California, Santa Clara Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds...

Lugar: Hillsboro, OR | 03/06/2026 01:06:55 AM | Salario: S/. No Especificado | Empresa: Intel