Work on detailed column ADC circuit design, with a focus on column layout design. Collaborating with other column ADC designers to optimize column ADC's performance with minimum silicon area. Conduct cross products column ADC layout compar...
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. ...
Conduct design and development of image sensor technologies in advanced sub-micron node, including finfet, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-bias gener...
Design a characterization/testing plan and work with R&D teams and manufacturing engineers to resolve various technical issues to meet performance requirements. Evaluate image sensor manufacturing quality by statistically analyzing multipl...
Control supply chain from release of new device to mass production of CMOS sensors. Identify functions and properties difference when a new version flow is established with various photo masks. Create wafer loading request by foundry serv...
Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality Knowledge of high performance and low power design techniques. Knowledge of FPGA and emulation platforms. Knowle...
We are seeking a highly skilled Design Characterization Engineer to join our fast-paced, innovation-driven R&D team. In this role, you will characterize and optimize CMOS image sensor performance, collaborate closely across engineering disc...
Responsible for the design development and characterization of embedded analog circuits, such as high speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal synchronization, clock tree and cross domain clock...
Design and implement sensor timing control logic and contribute to ISP system-level integration Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/perfo...
Design and implement sensor timing control logic and contribute to ISP system-level integration Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/perfo...