RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: San Jose, CA | 20/11/2025 23:11:46 PM | Salario: S/. $117832 - 236090 per year | Empresa: MaxLinear

RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: San Jose, CA | 19/11/2025 18:11:28 PM | Salario: S/. $117832 - 236090 per year | Empresa: MaxLinear

Senior Mechanical/Structural Engineer, Infrastructure

to continually work towards optimized vertiport launch solutions. Responsibilities: End-to-end project ownership through hosting... networks of electrified skydecks. Apply interdisciplinary engineering skills in fields of system-level process design...

Lugar: San Carlos, CA | 31/12/2025 21:12:37 PM | Salario: S/. $134100 - 221300 per year | Empresa: Joby Aviation

Senior Mechanical/Structural Engineer, Infrastructure

to continually work towards optimized vertiport launch solutions. Responsibilities End-to-end project ownership through hosting... networks of electrified skydecks. Apply interdisciplinary engineering skills in fields of system-level process design...

Lugar: San Carlos, CA | 30/12/2025 22:12:13 PM | Salario: S/. $134100 - 221300 per year | Empresa: Joby Aviation

Advanced Packaging Technology Pathfinding and Development Engineer

and custom solutions to meet constantly evolving customer needs. Many of the new designs require multi-chip, multiple component... has partnered with the world's leading manufacturers to solve our customer’s most challenging designs and integrations with industry...

Lugar: Austin, TX | 08/01/2026 18:01:38 PM | Salario: S/. $148500 - 219780 per year | Empresa: Marvell

Advanced Packaging, SI/PI Principal Engineer

designs require multi-chip, multiple component configurations involving, but not limited to, 2.5D and 3D packages, Co-packaged...’s most challenging designs and integrations with industry-leading packaging technologies What You Can Expect You will be responsible...

Lugar: Burlington, VT | 26/11/2025 21:11:53 PM | Salario: S/. $148500 - 219780 per year | Empresa: Marvell

RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: Carlsbad, CA | 21/11/2025 03:11:11 AM | Salario: S/. $104728 - 212170 per year | Empresa: MaxLinear

RF/MS IC Design Engineer, Optical Networking & SERDES

-power 5-nm 100G PAM4 DSP SoC, optimized for active electrical and optical cables Sierra: A single-chip solution for 5G Open... by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t...

Lugar: Carlsbad, CA | 19/11/2025 21:11:57 PM | Salario: S/. $104728 - 212170 per year | Empresa: MaxLinear

Field Application Engineering, Principal Engineer

of customer success — solving complex problems, enabling strategic designs, and ensuring that Marvell’s cutting-edge switch... tailored training sessions for customers on Marvell’s features, architecture, and optimized implementations. Create customer...

Lugar: Santa Clara, CA | 14/12/2025 03:12:13 AM | Salario: S/. $140550 - 210560 per year | Empresa: Marvell