Eng II - Sys

to support telecom subsystem design, development, integration, and test throughout the lifecycle of space vehicle (SV... to appropriately scope subsystem design, assembly, integration, test, launch and early operation (LEOPS) for proposals or studies...

Lugar: Boulder, CO | 17/01/2026 01:01:35 AM | Salario: S/. No Especificado | Empresa: BAE Systems

SW Engineer

. Responsibilities: 1. Design and development of the SDK drivers for the physical layer in the ethernet stack 2. Design, develop... and design teams to ensure seamless integration of software and hardware components 4. Work with the Application Engineering...

Lugar: San Jose, CA | 16/01/2026 23:01:44 PM | Salario: S/. No Especificado | Empresa: Broadcom

Program Manager / Chief Enterprise Architect

-compliant architecture products (OV, SV, TV, DIV views) Design and implement data governance frameworks and enterprise data... technical design reviews and architecture assessment boards Mentor and develop enterprise architecture team members Establish...

Lugar: Washington DC | 16/01/2026 18:01:09 PM | Salario: S/. No Especificado | Empresa: Zantech

Design Verification Engineer

Job Requirements POSITION: Design Verification Engineer Who We Are: Quest Global delivers world-class end-to-end... are not only inspired by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner...

Lugar: San Jose, CA | 16/01/2026 18:01:51 PM | Salario: S/. $140000 - 170000 per year | Empresa: Quest Global

Senior Manager, Project Engineering

. Experience in the following engineering areas: IMS/WBS/EVMS/PE tasks regarding ground-to-space communications (SV command... or knowledge of Government contract acquisition lifecycle a plus Experience with management of design to cost activities...

Lugar: Fort Wayne, IN | 14/01/2026 18:01:39 PM | Salario: S/. No Especificado | Empresa: L3Harris Technologies

Analog/Mixed Signal Verilog Modeling Design Engineer

) Experience with using AI tools such as Cursor, chipAgents to generate analog SV models and testbench based on a given design spec... power charging, health sensing AFE and satellite AFEs using SystemVerilog language. Interface with analog design team...

Lugar: Irvine, CA | 13/01/2026 20:01:33 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Principal Scientist, Analytical Development

accountability for analytical deliverables and progress on CMC and manufacturing plans for all development projects Design, plan... but not limited to high-resolution MS, SEC, CE (icIEF/CE-SDS), SV-AUC, DSC, CD, and plate-based assays Experience and expertise...

Lugar: San Diego, CA | 10/01/2026 22:01:13 PM | Salario: S/. $130800 - 179000 per year | Empresa: Neurocrine Biosciences