ASIC Methodology Engineer

timing analysis (STA) tools, e.g., PrimeTime and Tempus Problem-solving and analytical mindset Preferred Qualifications...

Lugar: Santa Clara, CA | 21/05/2026 21:05:42 PM | Salario: S/. No Especificado | Empresa: Qualcomm

ASIC Physical Design Engineer

with Static Timing Analysis including tools such as Tempus. Experience with block level EMIR closure. Physical Verification...

Lugar: Maynard, MA | 20/05/2026 17:05:32 PM | Salario: S/. $135800 - 195100 per year | Empresa: Cisco Systems