for High-speed SerDes/PHY (PCIe, CXL), LPDDR5, UCIe, and Other multi-gigabit interfaces. Define substrate stack-ups, materials... production. Proven experience with high-speed SerDes package development, including PCIe Gen5, LPDDR5 / LPDDR5X, USB 3.x or 10G...
Experience with PCIe endpoint firmware at the PHY, Link, and Transaction layers;familiarity with PCIe enumeration, MSI/MSI-X, SR...
expert for USB technologies including USB 2.0, USB 3.x, USB Type-C, USB Power Delivery (PD), and related ecosystem standards.... Evaluate, select, and guide integration of third-party USB controller, PHY, and protocol IP solutions. Drive architecture...
, USB 3.2 hubs, PCI-Express devices and switches, Automotive Ethernet PHY’s, and other connectivity interfaces in excess... (USB 2.0 / USB 3.x), or PCI‑Express Experience reviewing schematics and layouts for silicon validation or reference boards...
protocols (must: PHY, PCS and Data link layer of the OSI protocol stack;desirable: transaction and upper layers of the OSI... familiarity with (U)S(X)GMII Interlaken (4.25 to 412.5 Gbps) OTN OTUx (2.66 to 131 Gbps), or SONET/SDH OC3/12/48/192 (E,X...
, USB 3.2 hubs, PCI-Express devices and switches, Automotive Ethernet PHY’s, and other connectivity interfaces in excess... protocols, including, Ethernet, USB (USB 2.0 / USB 3.x), or PCI‑Express Experience reviewing schematics and layouts...
critical structures for High-speed SerDes/PHY (PCIe, CXL), LPDDR5, UCIe, and Other multi-gigabit interfaces. Define substrate..., LPDDR5 / LPDDR5X, USB 3.x or 10G interfaces Experience defining die-to-die and chiplet based RDL/bump architecture. Direct...
to communicate with PHY owners to understand the Specs for various IPs such as LPDDR, PCIe, UFS, USB, MIPI, etc., and with PCB... across multiple organizations such as PHY team, Package team, PCB team and providing timely feedback and updating design guidelines...
-performance Ethernet PHY chips. Other teams shape the micro-architecture of the blocks, accelerators and subsystems that make up..., Tcl Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor Hands...
-performance Ethernet PHY chips. Other teams shape the micro-architecture of the blocks, accelerators and subsystems that make up..., Perl, Tcl Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor Hands...