Packaging SIPI Engineer, Sr. Staff

to communicate with PHY owners to understand the Specs for various IPs such as LPDDR, PCIe, UFS, USB, MIPI, etc., and with PCB... across multiple organizations such as PHY team, Package team, PCB team and providing timely feedback and updating design guidelines...

Lugar: San Diego, CA | 18/07/2026 21:07:43 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Sr. Product Marketing Manager

-speed interface IP. Familiarity with PCIe Gen5/Gen6/Gen7, CXL 2.0/3.x/4.0, PIPE, IDE, TDISP, FLIT mode, ordering rules, RAS... between controller, PHY/SerDes, firmware, software, and system validation. Participation in or close familiarity with industry standards...

Lugar: San Jose, CA | 14/07/2026 19:07:54 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems
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