Senior Channel & Business Development Manager - X-PHY® (AMER & LATAM)

About Flexxon & X-PHY® Flexxon is a global pioneer in hardware-level security innovations. Our flagship solution, X... OSI model. Unlike traditional software security that relies on delayed patches and constant updates, X-PHY® monitors...

Lugar: USA | 10/08/2026 17:08:22 PM | Salario: S/. No Especificado | Empresa: X-PHY

Senior Channel & Business Development Manager - X-PHY

About Flexxon & X-PHY Flexxon is a global pioneer in hardware-level security innovations. Our flagship solution, X... OSI model. Unlike traditional software security that relies on delayed patches and constant updates, X-PHY monitors read...

Lugar: San Francisco, CA | 21/09/2026 17:09:24 PM | Salario: S/. No Especificado | Empresa: FLEXXON

Digital IC Design Intern, BS - Summer 2027

-performance Ethernet PHY chips. Other teams shape the micro-architecture of the blocks, accelerators and subsystems that make up..., Tcl Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor Hands...

Lugar: Santa Clara, CA | 23/09/2026 02:09:10 AM | Salario: S/. $30 - 59 per hour | Empresa: Marvell

Digital IC Design Intern, MS - Summer 2027

-performance Ethernet PHY chips. Other teams shape the micro-architecture of the blocks, accelerators and subsystems that make up..., Perl, Tcl Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor Hands...

Lugar: Santa Clara, CA | 22/09/2026 17:09:26 PM | Salario: S/. $35 - 70 per hour | Empresa: Marvell

Packaging SIPI Engineer, Sr. Staff

to communicate with PHY owners to understand the Specs for various IPs such as LPDDR, PCIe, UFS, USB, MIPI, etc., and with PCB... across multiple organizations such as PHY team, Package team, PCB team and providing timely feedback and updating design guidelines...

Lugar: San Diego, CA | 19/07/2026 01:07:11 AM | Salario: S/. No Especificado | Empresa: Qualcomm

Sr. Product Marketing Manager

-speed interface IP. Familiarity with PCIe Gen5/Gen6/Gen7, CXL 2.0/3.x/4.0, PIPE, IDE, TDISP, FLIT mode, ordering rules, RAS... between controller, PHY/SerDes, firmware, software, and system validation. Participation in or close familiarity with industry standards...

Lugar: San Jose, CA | 15/07/2026 02:07:44 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems
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