FPGA Engineer (m/f/d) – Digital Front-End & Real-Time Waveform Generation
We are looking forward to: Completed technical studies, e.g. in computer science or electronical engineering Strong RTL design experience...
We are looking forward to: Completed technical studies, e.g. in computer science or electronical engineering Strong RTL design experience...
with RTL, DFT, PD, and verification teams to achieve design closure Ensure high-quality sign-off meeting PPA (Power...
gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom... in Register Transfer Level (RTL) coding (Verilog and System Verilog) Experience with standard simulation tools for digital designs...
& Responsibilities Requirements gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding... methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog) Experience with standard...
Architecture development for CMOS designs Design and RTL coding of digital and full-custom modules Verification on module and chip... in Register Transfer Level (RTL) coding (Verilog) Experience with standard simulation tools for digital designs Basic knowledge...
& Responsibilities Requirements gathering and elicitation for IP Architecture development for CMOS designs Design and RTL coding... and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog and System-Verilog) Experience...
Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases... Circuit (ASIC) design methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog...
activities in close collaboration with the RTL Shared Service Center. Review accounting records, balance sheet reconciliations... activities in close collaboration with the RTL Shared Service Center. Review accounting records, balance sheet reconciliations...
UVM-based verification environments for RTL simulation. Develop testcases within appropriate verification frameworks..., including stimulus generation and assertion-based verification. Run simulations across multiple abstraction levels (RTL, power...
and integrate digital blocks. Develop high-quality, area-optimal, low-power RTL design using industry-standard hardware...