ASIC/FPGA/Hardware Engineer

, and embedded systems Perform and support digital circuit analysis throughout various stages of the design lifecycle (RTL, netlist...: Cadence, Synopsys, Siemens, Xilinx Vivado, Altera Quartus, Questa, Modelsim, Icarus Verilog, Verilator, etc. Ability to work...

Lugar: Columbus, OH | 24/07/2026 17:07:00 PM | Salario: S/. $85000 - 140000 per year | Empresa: Battelle

Support Consultant- H

AlteraDigitalHealth – MS on site Springhill Medical Center Role: Support Consultant Position Overview Support... of healthcare systems and Electronic Health Records (EHR) Work Environment & Expectations 24x7 operational environment...

Lugar: Mobile, AL | 23/07/2026 17:07:47 PM | Salario: S/. $27.02 per hour | Empresa: Harris Computer

Staff Digital Signal Processing Engineer

partners We are seeking cleared or clearable Staff Digital Signal Processing Engineers who are self-motivated, energetic... Processing algorithms both in time and frequency domains, understanding of Digital Communication Systems and various modulation...

Lugar: Cincinnati, OH | 22/07/2026 17:07:59 PM | Salario: S/. No Especificado | Empresa: Northrop Grumman

Digital Signal Processing Engineer

partners We are seeking cleared or clearable Digital Signal Processing Engineers who are self-motivated, energetic... Processing algorithms both in time and frequency domains, understanding of Digital Communication Systems and various modulation...

Lugar: Cincinnati, OH | 22/07/2026 17:07:39 PM | Salario: S/. $91800 - 137600 per year | Empresa: Northrop Grumman

Sr. Principal Digital Signal Processing Engineer

partners We are seeking cleared or clearable Sr. Principal Digital Signal Processing Engineers who are self-motivated... Signal Processing algorithms both in time and frequency domains, understanding of Digital Communication Systems and various...

Lugar: Cincinnati, OH | 22/07/2026 17:07:01 PM | Salario: S/. No Especificado | Empresa: Northrop Grumman

FPGA Engineering Manager (MTD, San Jose, CA)

supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge... in Digital ASIC or FPGA design Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects through...

Lugar: San Jose, CA | 17/07/2026 21:07:42 PM | Salario: S/. No Especificado | Empresa: Teradyne

FPGA Design Engineer (MTD, Tualatin, OR)

supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge... with a minimum of 3 years of relevant work experience. Experience with Digital Design and Architecture RTL coding, synthesis...

Lugar: Tualatin, OR | 17/07/2026 20:07:47 PM | Salario: S/. $123100 per year | Empresa: Teradyne

FPGA Design Engineer (MTD, San Jose, CA)

supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge... with a minimum of 3 years of relevant work experience. Experience with Digital Design and Architecture RTL coding, synthesis...

Lugar: San Jose, CA | 17/07/2026 20:07:16 PM | Salario: S/. $135400 per year | Empresa: Teradyne

Lead FPGA Design Engineer

: Lead debugging and testing campaigns on physical printed circuit boards (PCBs) using lab equipment like digital... health, and resolution plans clearly to leadership, customers, and cross-functional stakeholders. JOB QUALIFICATIONS...

Lugar: Austin, TX | 17/07/2026 18:07:39 PM | Salario: S/. No Especificado | Empresa: Jabil