Principal FPGA Engineer

of Our People Paid Time Off I 401K with Employer Match and Profit Sharing I Health and Wellness Benefits I Learning... development from concept through coding, simulation, synthesis, place-and-route, and bitstream generation. Perform digital logic...

Lugar: Ashburn, VA | 17/06/2026 18:06:31 PM | Salario: S/. $144100 - 192100 per year | Empresa: Curtiss-Wright

Research Engineer

and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado) * 2-5 years of solid... understanding of digital logic design, including FSMs, pipelining, and resource optimization. 2-5 years of experience with RTL...

Lugar: Niskayuna, NY | 14/06/2026 02:06:18 AM | Salario: S/. $98400 - 164000 per year | Empresa: GE Vernova

Lead Research Engineer - FPGA Design

and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado) * 2-5 years of solid... understanding of digital logic design, including FSMs, pipelining, and resource optimization. 2-5 years of experience with RTL...

Lugar: Niskayuna, NY | 14/06/2026 02:06:51 AM | Salario: S/. $98400 - 164000 per year | Empresa: GE Vernova

FPGA Design - Lead Research Engineer

and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado) * 2-5 years of solid... understanding of digital logic design, including FSMs, pipelining, and resource optimization. 2-5 years of experience with RTL...

Lugar: Niskayuna, NY | 14/06/2026 02:06:39 AM | Salario: S/. $98400 - 164000 per year | Empresa: GE Vernova

FPGA Design - Lead Research Engineer "CLEARANCE REQUIRED"

and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado) * 2-5 years of solid... understanding of digital logic design, including FSMs, pipelining, and resource optimization. 2-5 years of experience with RTL...

Lugar: Niskayuna, NY | 11/06/2026 00:06:41 AM | Salario: S/. $98400 - 164000 per year | Empresa: GE Vernova

Principal/ Sr. Principal FPGA Design Engineer

design, verification, synthesis and place & route for our digital signal processing products. You will be working... with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device...

Lugar: Rolling Meadows, IL | 05/06/2026 17:06:37 PM | Salario: S/. $119600 - 179400 per year | Empresa: Northrop Grumman

Design Verification Engineer - Viasat Government

, Synopsys, and/or Mentor) Foundational knowledge of digital logic and timing considerations Strong written and verbal... with Programmable Logic EDA tools, including AMD/Xilinx Vivado, Altera Quartus, and Microchip Libero Experience with the FPGA design...

Lugar: Marlborough, MA | 01/06/2026 01:06:45 AM | Salario: S/. No Especificado | Empresa: Viasat