Memory Design Application Engineer

is a strong plus Proficient in scripting languages like Perl/Tcl/Python, and power-aware RTL and UPF flow is a plus Experience in ASIC or SoC...), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating...

Lugar: Chandler, AZ | 13/01/2026 20:01:34 PM | Salario: S/. No Especificado | Empresa: Intel

DFT Application Engineer

and guidance on DFT implementation strategies DFT Methodology & Quality Leadership Drive quality improvements in ASIC DFT/DFM... CMOS processes (22nm and below) 3+ years of combined experience in the following: implementing ASIC DFT/DFM insertion...

Lugar: Chandler, AZ | 10/01/2026 23:01:07 PM | Salario: S/. No Especificado | Empresa: Intel

IP Enablement Application Engineer

in SOC IP Integration 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog Experience in ASIC...), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating...

Lugar: Chandler, AZ | 10/01/2026 21:01:03 PM | Salario: S/. No Especificado | Empresa: Intel