Senior ASIC Design Engineer

Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...

Lugar: Los Angeles, CA | 11/04/2026 02:04:54 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Senior ASIC Design Engineer

Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...

Lugar: San Jose, CA | 11/04/2026 02:04:14 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

ASIC Design Verification Engineer, Amazon Leo

Description Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is to deliver fast, reliable internet connectivity to customers beyond the reach of existing networks. From individual households to schools, hospitals, bus...

Lugar: Austin, TX | 11/04/2026 01:04:41 AM | Salario: S/. No Especificado | Empresa: Amazon

Senior Manager, ASIC / SoC Design Engineering

Job Description: WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a cul...

Lugar: San Jose, CA | 10/04/2026 19:04:35 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior ASIC Design Engineer

Senior/Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Optim...

Lugar: Irvine, CA | 10/04/2026 18:04:26 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Senior ASIC Design Engineer

Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...

Lugar: San Diego, CA | 10/04/2026 18:04:50 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

ASIC Design-for-Test (DFT)

Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote, PST time zone Nbr of openings: 4 positions. Visa type: Any Visa who can work in PST time zone Position type: W2 or C2C Mandatory skills: DFT Architecture defini...

Lugar: San Jose, CA | 10/04/2026 17:04:08 PM | Salario: S/. No Especificado | Empresa: Accord Technologies Inc.