, closely work with design verification teams to review test plans and execution of test, ability to bring up block tests... on silicon during lab testing, and maintenance of designed blocks and reusable IPs. Produce comprehensive block uArchitecture...
, elaboration, simulation, and regression flow across block, subsystem, and full-chip designs, with an emphasis on performance... and verification teams. Key Responsibilities Design, implement, and maintain chip design build flows supporting block, subsystem...
. Generate and verify timing constraints while addressing timing violations at the chip or block level for SoCs. Conduct timing...
/UVM verification environments for complex SoCs, from block-level IPs through full-chip integration. Create detailed... verification plans for block, IP, and SoC-level projects, ensuring comprehensive functional and code coverage. Architect UVM...
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performance and identify any bugs in own work and provides instructions to test engineers for their design block. Debugs...
targeted tests to characterize block‑level functionality, optimize performance, and improve product robustness. Contribute...
and influence block-level and subsystem-level micro-architecture Develop high-quality, synthesizable RTL using Verilog...-on experience with lint, CDC, and RDC analysis Proven ownership and track record of block or subsystem delivery on production...
to coordinate with online articles, guides, and block posts, coordinating image permissions and utilizing proper citations...
of the block being verified for test plan development, execution, debug, coverage closure and gate level simulations · Coach...