RFIC Layout Engineer

with extensive knowledge of deep sub-micron CMOS. High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet...

Lugar: Austin, TX | 05/11/2025 23:11:37 PM | Salario: S/. No Especificado | Empresa: Apple

RFIC Layout Engineer

. High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology. Knowledge of CADENCE layout tools...

Lugar: Austin, TX | 05/11/2025 23:11:29 PM | Salario: S/. No Especificado | Empresa: Apple

RFIC Layout Engineer

level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology. Knowledge of CADENCE layout tools...

Lugar: Austin, TX | 05/11/2025 22:11:39 PM | Salario: S/. No Especificado | Empresa: Apple

Senior Physical Verification Engineer, VLSI Implementation

in both PV signoff tools as well as EDA implementation tools (ICC2/Innovus/other) Direct experience with ICV and Calibre... tailored to specific design requirements for ICV and CALIBRE tools. Good scripting and programming skills in Python/Perl...

Lugar: Santa Clara, CA | 05/11/2025 02:11:53 AM | Salario: S/. No Especificado | Empresa: Nvidia